added flashrw

This commit is contained in:
2022-09-17 19:43:44 +02:00
parent c853f2301d
commit 73c64e0520
8 changed files with 457 additions and 4 deletions

7
flashrw/.gitignore vendored Normal file
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@@ -0,0 +1,7 @@
*.elf
*.bin
*.map
*.geany
*.o
*~
work

81
flashrw/Makefile Normal file
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#
# Copyright: Oleg Borodin <onborodin@gmail.com> 2018
#
.SECONDARY:
CFLAGS+= -I. -O2 -DSTM32F4 #-std=c99
CFLAGS+= -mfloat-abi=hard
CFLAGS+= -mcpu=cortex-m4
CFLAGS+= -mthumb
CFLAGS+= -fno-common -ffunction-sections -fdata-sections
CFLAGS+= -g -gdwarf-2
CFLAGS+= -Wall
LDFLAGS+= ${CFLAGS}
LDFLAGS+= --static
#LDFLAGS+= -nostartfiles
LDFLAGS+= -T main.ld
LDFLAGS+= -Wl,-Map=main.map
LDFLAGS+= -Wl,--cref -Wl,--gc-sections
LDFLAGS+= -lopencm3_stm32f4
LDFLAGS+= -Wl,--start-group -lc -lm -lgcc -lnosys -Wl,--end-group
TARGET= arm-eabi
all: main.bin
OBJS+= main.o
OBJS+= syscall.o
OBJS+= usartu.o
main.elf: $(OBJS)
$(TARGET)-gcc $(^F) $(LDFLAGS) -o $@
$(TARGET)-size --format=berkeley $@
%.o: %.c
$(TARGET)-gcc $(CFLAGS) -c -o $@ $<
%.o: %.S
$(TARGET)-gcc $(CFLAGS) -c -o $@ $<
%.bin: %.elf
$(TARGET)-objcopy -O binary $< $@
%.elf: %.o
$(TARGET)-gcc $(^F) $(LDFLAGS) -o $@
$(TARGET)-size --format=berkeley $@
clean:
rm -f *.i *.o *.elf *.bin *.map *~ *.hex *.d *.s
flash: main.bin
@openocd \
-c 'puts "--- START --------------------"' \
-f 'interface/stlink.cfg' \
-f 'target/stm32f4x.cfg' \
-c 'puts "--- INIT --------------------"' \
-c "init" \
-c "reset halt" \
-c 'puts "--- WRITE --------------------"' \
-c "flash write_image erase $< 0x08000000"\
-c 'puts "--- VERIFY --------------------"' \
-c "verify_image $<" \
-c 'puts "--- RESET --------------------"' \
-c "reset" \
-c 'puts "--- DONE --------------------"' \
-c "shutdown"
debug: main.bin
@openocd \
-c 'puts "--- START --------------------"' \
-f 'interface/stlink.cfg' \
-f 'target/stm32f4x.cfg' \
-c 'puts "--- INIT --------------------"' \
-c "init" \
-c "halt" \
-c "poll"
#EOF

90
flashrw/main.c Normal file
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/*
* Copyright 2022 Oleg Borodin <borodin@unix7.org>
*/
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/cm3/systick.h>
#include <libopencm3/cm3/scb.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/usart.h>
#include <libopencm3/stm32/flash.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdbool.h>
#include <string.h>
#include <math.h>
#include <usartu.h>
static void clock_setup(void) {
rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_GPIOB);
rcc_periph_clock_enable(RCC_USART1);
rcc_periph_clock_enable(RCC_I2C1);
rcc_periph_clock_enable(RCC_TIM2);
rcc_periph_clock_enable(RCC_TIM5);
}
static void usart_setup(uint32_t usart, uint32_t gpioport, uint32_t gpiopins, uint32_t baudrate) {
usart_disable(usart);
gpio_mode_setup(gpioport, GPIO_MODE_AF, GPIO_PUPD_NONE, gpiopins);
gpio_set_af(gpioport, GPIO_AF7, gpiopins);
gpio_set_output_options(gpioport, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, gpiopins);
usart_set_baudrate(usart, baudrate);
usart_set_databits(usart, 8);
usart_set_stopbits(usart, USART_STOPBITS_1);
usart_set_parity(usart, USART_PARITY_NONE);
usart_set_flow_control(usart, USART_FLOWCONTROL_NONE);
usart_set_mode(usart, USART_MODE_TX_RX);
usart_disable_rx_interrupt(usart);
usart_enable(usart);
}
#define SECTOR_NO 1
extern uint8_t _config;
typedef struct {
int32_t gz;
int32_t gy;
} config_t;
void config_init(config_t* c){
c->gz = 0x12;
c->gy = 0x17;
};
int main(void) {
clock_setup();
usart_setup(USART1, GPIOA, GPIO9 | GPIO10, 115200);
uint32_t caddr = 0xFFFFFFFF;
caddr = (uint32_t)&_config;
config_t* dconfig = (config_t*)caddr;
config_t tconfig;
config_init(&tconfig);
flash_unlock();
flash_erase_sector(SECTOR_NO, sizeof(config_t));
printf("\r\n");
printf("gy = 0x%08lx \r\n", dconfig->gy);
flash_program(caddr, (uint8_t*)&tconfig, (uint32_t)sizeof(config_t));
printf("gy = 0x%08lx \r\n", dconfig->gy);
while (true) {
};
}

88
flashrw/main.ld Normal file
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MEMORY {
FLASH0 (rx) : ORIGIN = 0x08000000, LENGTH = 16K
FLASH1 (rw) : ORIGIN = 0x08004000, LENGTH = 16K
FLASH3 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
PROVIDE(_stack = ORIGIN(SRAM) + LENGTH(SRAM));
PROVIDE(_config = ORIGIN(FLASH1));
stack_size = 40k;
heap_size = 40k;
_stack_start = ORIGIN(SRAM) + LENGTH(SRAM);
_stack_end = _stack_start - stack_size;
EXTERN (vector_table)
ENTRY(reset_handler)
SECTIONS {
text : {
*(.vectors)
. = ALIGN(4);
*(.rodata*)
. = ALIGN(4);
} >FLASH0
.text : {
*(.text*)
. = ALIGN(4);
} >FLASH3
.preinit_array : {
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
} >FLASH0
.init_array : {
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
} >FLASH0
.fini_array : {
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
} >FLASH0
. = ALIGN(4);
_etext = .;
.data : {
_data = .;
. = ALIGN(4);
*(.data*)
. = ALIGN(4);
_edata = .;
} >SRAM AT >FLASH0
_data_loadaddr = LOADADDR(.data);
.bss : {
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} >SRAM
. = ALIGN(4);
.heap : {
_heap_start = .;
. = . + heap_size;
_heap_end = .;
} > SRAM
. = ALIGN(4);
_end = .;
}

161
flashrw/syscall.c Normal file
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/*
* Copyright 2022 Oleg Borodin <borodin@unix7.org>
*/
#include <libopencm3/stm32/usart.h>
#include <stdlib.h>
#include <reent.h>
#include <sys/stat.h>
#include <sys/errno.h>
#include <errno.h>
#include <usartu.h>
#undef errno
extern int errno;
char *__env[1] = { 0 };
char **environ = __env;
int _execve(char *name, char **argv, char **env) {
errno = ENOMEM;
return -1;
}
int _fork(void) {
errno = EAGAIN;
return -1;
}
int _getpid(void) {
return 1;
}
int _kill(int pid, int sig) {
errno = EINVAL;
return -1;
}
void _exit(int i) {
while (1);
}
int _isatty(int file) {
return 1;
}
int _fstat(int file, struct stat *st) {
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new) {
errno = EMLINK;
return -1;
}
int _lseek(int file, int ptr, int dir) {
return 0;
}
int _open(const char *name, int flags, int mode) {
return -1;
}
#define STDIN 0
#define STDOUT 1
#define STDERR 3
int _read(int file, char *ptr, int len) {
int i = 0;
while (i < len) {
ptr[i++] = 0;
}
return i;
}
int _write(int file, char *ptr, int len) {
int i;
if ((file == STDOUT) || (file == STDERR)) {
for (i = 0; i < len; i++) {
usart_putc(USART1, ptr[i]);
}
return len;
}
return 0;
}
int _stat(char *file, struct stat *st) {
st->st_mode = S_IFCHR;
return 0;
}
int _close(int file) {
return -1;
}
int _times(struct tms *buf) {
return -1;
}
int _unlink(char *name) {
errno = ENOENT;
return -1;
}
int _wait(int *status) {
errno = ECHILD;
return -1;
}
#if 0
void *xxx_sbrk(int incr) {
extern unsigned char *_end;
static unsigned char *heap = NULL;
unsigned char *prev_heap;
if (heap == NULL) {
heap = (unsigned char*)&_end;
}
prev_heap = heap;
heap += incr;
return prev_heap;
}
#endif
register char* stack_ptr __asm__ ("sp");
caddr_t __attribute__((weak)) _sbrk (int incr) {
extern char end __asm__ ("_end");
static char * heap_end;
char * prev_heap_end;
if (heap_end == NULL) {
heap_end = &end;
}
prev_heap_end = heap_end;
if (heap_end + incr > stack_ptr) {
#if 0
extern void abort (void);
_write (1, "_sbrk: Heap and stack collision\n", 32);
abort ();
#else
errno = ENOMEM;
return (caddr_t) -1;
#endif
}
heap_end += incr;
return (caddr_t) prev_heap_end;
}

19
flashrw/usartu.c Normal file
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/*
* Copyright 2022 Oleg Borodin <borodin@unix7.org>
*/
#include <libopencm3/stm32/usart.h>
#include <stdlib.h>
#include <stdio.h>
void usart_puts(uint32_t usart, char* str) {
int i = 0;
while (str[i] != 0) {
usart_send_blocking(usart, str[i++]);
}
}
void usart_putc(uint32_t usart, char c) {
usart_send_blocking(usart, c);
}

7
flashrw/usartu.h Normal file
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#ifndef _USARTU_H_XYZ
#define _USARTU_H_XYZ
void usart_puts(uint32_t usart, char * str);
void usart_putc(uint32_t usart, char c);
#endif

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@@ -10,8 +10,8 @@
#include <ibus.h>
#define IBUS_FRAMESIZE 32
#define IBUS_CHANNELS 14
#define STARTFR_BYTE 0x20
#define COMMAND_BYTE 0x40
void ibus_init(ibus_t* bus) {
memset(bus->iframe, 0, sizeof(bus->iframe));
@@ -22,10 +22,10 @@ void ibus_init(ibus_t* bus) {
bool ibus_recv(ibus_t* bus, uint8_t ibyte) {
if(bus->findex == 0 && ibyte != 0x20) {
if(bus->findex == 0 && ibyte != STARTFR_BYTE) {
return false;
}
if(bus->findex == 1 && ibyte != 0x40) {
if(bus->findex == 1 && ibyte != COMMAND_BYTE) {
bus->findex = 0;
return false;
}