243 lines
6.4 KiB
C
243 lines
6.4 KiB
C
/*
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* Copyright 2022 Oleg Borodin <borodin@unix7.org>
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*/
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/dma.h>
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#include <libopencm3/cm3/nvic.h>
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static void timer_gpio_setup(uint32_t gpio_group, uint32_t gpio_af, uint32_t gpio_pin) {
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gpio_mode_setup(gpio_group, GPIO_MODE_AF, GPIO_PUPD_NONE, gpio_pin);
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gpio_set_af(gpio_group, gpio_af, gpio_pin);
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gpio_set_output_options(gpio_group, GPIO_OTYPE_PP, GPIO_OSPEED_100MHZ, gpio_pin);
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}
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static void timer_channel_disable(uint32_t timer, uint32_t channel) {
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timer_disable_oc_output(timer, channel);
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switch(channel) {
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case TIM_OC1:
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timer_disable_irq(timer, TIM_DIER_CC1DE);
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break;
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case TIM_OC2:
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timer_disable_irq(timer, TIM_DIER_CC2DE);
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break;
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case TIM_OC3:
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timer_disable_irq(timer, TIM_DIER_CC3DE);
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break;
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case TIM_OC4:
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timer_disable_irq(timer, TIM_DIER_CC4DE);
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break;
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}
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}
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static void timer_channel_enable(uint32_t timer, uint32_t channel) {
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timer_enable_oc_output(timer, channel);
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switch(channel) {
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case TIM_OC1:
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timer_enable_irq(timer, TIM_DIER_CC1DE);
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break;
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case TIM_OC2:
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timer_enable_irq(timer, TIM_DIER_CC2DE);
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break;
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case TIM_OC3:
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timer_enable_irq(timer, TIM_DIER_CC3DE);
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break;
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case TIM_OC4:
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timer_enable_irq(timer, TIM_DIER_CC4DE);
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break;
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};
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}
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static void timer_channel_init(uint32_t timer, uint32_t channel) {
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timer_disable_oc_output(timer, channel);
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timer_set_oc_value(timer, channel, 0);
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timer_disable_oc_clear(timer, channel);
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timer_disable_oc_preload(timer, channel);
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timer_set_oc_slow_mode(timer, channel);
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timer_set_oc_mode(timer, channel, TIM_OCM_PWM1);
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timer_set_oc_polarity_high(timer, channel);
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timer_set_oc_idle_state_set(timer, channel);
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timer_enable_oc_output(timer, channel);
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}
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#define DSHOT600 472
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#define DSHOT300 236
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static void timer_init(uint32_t timer, uint32_t bitrate) {
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int prescale = 0;
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int period = 65536 / bitrate - 1;
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timer_set_mode(timer, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
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timer_disable_preload(timer);
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timer_continuous_mode(timer);
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timer_set_prescaler(timer, prescale);
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timer_set_period(timer, period);
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timer_set_repetition_counter(timer, 0);
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timer_enable_break_main_output(timer);
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timer_enable_counter(timer);
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}
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void timer_setup(uint32_t timer, uint32_t bitrate) {
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int period = 65536 / bitrate - 1;
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timer_set_period(timer, period);
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}
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static void timer_disable(uint32_t timer) {
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timer_disable_counter(timer);
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}
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static void timer_enable(uint32_t timer) {
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timer_enable_counter(timer);
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}
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static uint32_t timer_get_period(uint32_t timer) {
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return TIM_ARR(timer);
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}
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static void dma_init(uint32_t dma, uint32_t stream, uint32_t channel) {
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dma_stream_reset(dma, stream);
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dma_set_priority(dma, stream, DMA_SxCR_PL_HIGH);
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dma_set_memory_size(dma, stream, DMA_SxCR_MSIZE_32BIT);
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dma_set_peripheral_size(dma, stream, DMA_SxCR_PSIZE_16BIT);
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dma_enable_memory_increment_mode(dma, stream);
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dma_disable_peripheral_increment_mode(dma, stream);
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dma_enable_circular_mode(dma, stream);
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dma_set_transfer_mode(dma, stream, DMA_SxCR_DIR_MEM_TO_PERIPHERAL);
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dma_channel_select(dma, stream, channel);
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}
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static void dma_setup(uint32_t dma, uint32_t stream, uint32_t* src, uint32_t size, uint32_t timer) {
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dma_set_peripheral_address(dma, stream, (uint32_t)&(TIM_CCR1(timer)));
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dma_set_memory_address(dma, stream, (uint32_t)src);
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dma_set_number_of_data(dma, stream, size);
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}
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static void dma_disable(uint32_t dma, uint32_t stream) {
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dma_disable_stream(dma, stream);
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}
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static void dma_enable(uint32_t dma, uint32_t stream) {
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dma_enable_stream(dma, stream);
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}
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void delay(uint32_t n) {
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for (volatile int i = 0; i < n; i++)
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__asm__("nop");
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}
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#define BUFFER_SIZE 30
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void dshot_encode(uint16_t command, uint32_t* buffer, uint32_t period) {
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uint32_t dshot0 = period * 39 / 100;
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uint32_t dshot1 = period * 71 / 100;
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uint16_t payload = command << 1;
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uint8_t crc = (payload ^ (payload >> 4) ^ (payload >> 8)) & 0x0F;
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for (int i = 0; i < 16; i++) buffer[i] = dshot1;
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int offset = 0;
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for (int i = 0; i < 11; i++) {
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if ((command & ((uint16_t)1 << (10 - i))) > 0) {
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buffer[i] = dshot1;
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} else {
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buffer[i] = dshot0;
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}
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}
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buffer[11] = dshot0;
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offset = 12;
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for (int i = 0; i < 4; i++) {
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if ((crc & (((uint16_t)1) << (3 - i))) > 0) {
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buffer[i + offset] = dshot1;
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} else {
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buffer[i + offset] = dshot0;
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}
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}
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offset = 16;
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for (int i = 0; i < BUFFER_SIZE - offset; i++) {
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buffer[i + offset] = 0x00;
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}
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}
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int main(void) {
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rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
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rcc_periph_clock_enable(RCC_TIM4);
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rcc_periph_clock_enable(RCC_DMA1);
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rcc_periph_clock_enable(RCC_GPIOB);
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uint32_t timer = TIM4;
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uint32_t timer_channel = TIM_OC1;
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uint32_t dma = DMA1;
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uint32_t dma_stream = DMA_STREAM0;
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uint32_t dma_channel = DMA_SxCR_CHSEL_2;
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uint32_t buffer[BUFFER_SIZE];
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for (int i = 0; i < BUFFER_SIZE; i++) {
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buffer[i] = 0;
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}
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dma_init(dma, dma_stream, dma_channel);
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dma_disable(dma, dma_stream);
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dma_setup(dma, dma_stream, buffer, BUFFER_SIZE * 2, timer);
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dma_enable(dma, dma_stream);
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timer_disable(timer);
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timer_init(timer, DSHOT600);
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uint32_t gpio_group = GPIOB;
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uint32_t gpio_af = GPIO_AF2;
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uint32_t gpio_pin = GPIO6;
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timer_channel_disable(timer, timer_channel);
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timer_gpio_setup(gpio_group, gpio_af, gpio_pin);
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timer_channel_init(timer, timer_channel);
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timer_channel_enable(timer, timer_channel);
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timer_enable(timer);
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uint32_t period = timer_get_period(timer);
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delay(1 * 1000 * 1000);
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uint16_t command = 0;
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dshot_encode(command, buffer, period);
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delay(120 * 1000 * 1000);
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while (1) {
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for (uint16_t i = 48; i < 2048 / 6; i++) {
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delay(100 * 1000);
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command = i;
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dshot_encode(command, buffer, period);
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}
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for (uint16_t i = 2047 / 6; i > 48; i--) {
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delay(100 * 1000);
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command = i;
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dshot_encode(command, buffer, period);
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}
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};
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return 0;
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}
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