updated vendor
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+12
-7
@@ -152,13 +152,17 @@ var ARM struct {
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// The booleans in Loong64 contain the correspondingly named cpu feature bit.
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// The struct is padded to avoid false sharing.
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var Loong64 struct {
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_ CacheLinePad
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HasLSX bool // support 128-bit vector extension
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HasLASX bool // support 256-bit vector extension
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HasCRC32 bool // support CRC instruction
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HasLAM_BH bool // support AM{SWAP/ADD}[_DB].{B/H} instruction
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HasLAMCAS bool // support AMCAS[_DB].{B/H/W/D} instruction
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_ CacheLinePad
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_ CacheLinePad
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HasLSX bool // support 128-bit vector extension
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HasLASX bool // support 256-bit vector extension
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HasCRC32 bool // support CRC instruction
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HasLAMCAS bool // support AMCAS[_DB].{B/H/W/D}
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HasLAM_BH bool // support AM{SWAP/ADD}[_DB].{B/H} instruction
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HasLLACQ_SCREL bool // support LLACQ.{W/D}, SCREL.{W/D} instruction
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HasSCQ bool // support SC.Q instruction
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HasDBAR_HINTS bool // supports finer-grained DBAR hints
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_ CacheLinePad
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}
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// MIPS64X contains the supported CPU features of the current mips64/mips64le
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@@ -232,6 +236,7 @@ var RISCV64 struct {
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HasZba bool // Address generation instructions extension
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HasZbb bool // Basic bit-manipulation extension
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HasZbs bool // Single-bit instructions extension
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HasZbc bool // Carryless multiplication extension
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HasZvbb bool // Vector Basic Bit-manipulation
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HasZvbc bool // Vector Carryless Multiplication
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HasZvkb bool // Vector Cryptography Bit-manipulation
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